1. Technical Field
The present invention relates to communication systems and, more particularly, to analog-to-digital and digital-to-analog converters used within transceivers.
2. Related Art
Communication systems are known to support wireless and wire lined communications between wireless and/or wire lined communication devices. Such communication systems range from national and/or international cellular telephone systems to the Internet to point-to-point in-home wireless networks. Each type of communication system is constructed, and hence operates, in accordance with one or more communication standard. For instance, wireless communication systems may operate in accordance with one or more standards, including, but not limited to, IEEE 802.11, Bluetooth, advanced mobile phone services (AMPS), digital AMPS, global system for mobile communications (GSM), code division multiple access (CDMA), local multi-point distribution systems (LMDS), multi-channel-multi-point distribution service (MMDS), and/or variations thereof.
Depending on the type of wireless communication system, a wireless communication device, such as a cellular telephone, two-way radio, personal digital assistant (PDA), personal computer (PC), laptop computer, home entertainment equipment, etc., communicates directly or indirectly with other wireless communication devices. For direct communications (also known as point-to-point communications), the participating wireless communication devices tune their receivers and transmitters to the same channel or channels (e.g., one of a plurality of radio frequency (RF) carriers of the wireless communication system) and communicate over that channel(s). For indirect wireless communications, each wireless communication device communicates directly with an associated base station (e.g., for cellular services) and/or an associated access point (e.g., for an in-home or in-building wireless network) via an assigned channel. To complete a communication connection between the wireless communication devices, the associated base stations and/or associated access points communicate with each other directly, via a system controller, via the public switched telephone network (PSTN), via the Internet, and/or via some other wide area network.
Each wireless communication device includes a built-in radio transceiver (i.e., receiver and transmitter) or is coupled to an associated radio transceiver (e.g., a station for in-home and/or in-building wireless communication networks, RF modem, etc.) that performs analog signal processing tasks as a part of converting data to a radio frequency (RF) signal for transmission and a received RF signal to data.
As is known, the transmitter includes a data modulation stage, one or more intermediate frequency stages, and a power amplifier. The data modulation stage converts raw data into baseband signals in accordance with the particular wireless communication standard. The one or more intermediate frequency stages mix the baseband signals with one or more local oscillations to produce RF signals. The power amplifier amplifies the RF signals prior to transmission via an antenna.
As is also known, the receiver is coupled to the antenna and includes a low noise amplifier, one or more intermediate frequency stages, a filtering stage, and a data recovery stage. The low noise amplifier receives an inbound RF signal via the antenna and amplifies it. The one or more intermediate frequency stages mix the amplified RF signal with one or more local oscillations to convert the amplified RF signal into a baseband signal or an intermediate frequency (IF) signal. As used herein, the term “low IF” refers to both baseband and intermediate frequency signals.
A filtering stage filters the low IF signals to attenuate unwanted out of band signals to produce a filtered signal. The data recovery stage recovers raw data from the filtered signal in accordance with the particular wireless communication standard. Alternate designs being pursued at this time further include direct conversion radios that produce a direct frequency conversion often in a plurality of mixing steps or stages.
As an additional aspect, these designs are being pursued as a part of a drive to continually reduce circuit size and power consumption. Along these lines, such designs are being pursued with CMOS technology thereby presenting problems not addressed by prior art designs. For example, one common design goal is to provide an entire system on a single chip. The drive towards systems-on-chip solutions for wireless applications continues to replace traditional analog signal processing tasks with digital processing to exploit the continued shrinkage of digital CMOS technology.
One approach to current designs by the applicant herein is to reduce analog signal processing performance requirements and to compensate for the relaxed performance requirements in the digital domain to provide required system performance. This approach is beneficial in that, in addition to the reduced silicon area requirements, the digital processing is insensitive to process and temperature variations. Applications for which this trend is observed include RF receivers where the received signal is digitized as early as possible in the receiver chain using a high dynamic range analog-to-digital converter (ADC), and in a variety of calibration circuits of the radio where signal levels must be measured accurately over a wide range of values. This trend thus increases the demand for embedded low-power, low-voltage ADCs providing high dynamic range in the interface between the analog and digital processing.
A class of ADCs capable of providing high dynamic range and particularly suitable for low-power and low-voltage implementation is known as continuous-time delta sigma analog-to-digital converters (CTΣΔADCs). These ADCs can be designed to operate with supply voltages in the range of 1.2V-1.5V and current consumption as low as a few hundred μAs. One problem encountered in many modern receivers implemented with low-voltage CMOS circuitry is the problem of DC offset. This problem may originate from a variety of sources, for example LO leakage; a fraction of the LO signal couples to the LNA input and is converted down to baseband and occurs at the output of the demodulator as a DC signal. DC offset, when presented at the ADC input, reduces the effective dynamic input range of the ADC. Worst-case, the ADC input is completely saturated in DC offset and the ADC overloads, leading to a complete malfunction of the radio receiver. Thus, a solution is needed to avoid or reduce the problem DC offset of the input for the ADC.